Computer Architecture and Organization (BLGM324)
Introduction to RISC architecture, MIPS Instruction set: Representing instructions in the computer, Linkers, Supporting procedures in computer hardware, Passing the arguments to a procedure, Constant or immediate operands in MIPS, Addressing in branches and jumps in MIPS, MIPS addressing modes, MIPS assembly program. Integer Arithmetics: Negative number representations, Addition and subtraction, Logic operations, Constructing the Arithmetic Logic Unit (ALU), Multiplication algorithms, Division algorithms, Floating point arithmetic algorithms. Design Performance Measures: CPU performance, Evaluating the performance. Processor Data path: Logic conventions and clocking, MIPS single clock cycle implementation: (Building a datapath), The simple implementation scheme, The multiple clock cycle implementation, Designing the control unit for the multiple clock cycle implementation: Finite state machines (FSM) and Microprogramming. Enhancing Performance with Pipelining: A pipelined datapath, Pipelined control, Data hazards, Control for data hazards, Reducing data hazards, Branch hazards, Exceptions, Performance of pipelined systems.
Lecture Hour (hrs/week): 4
Lab (hrs/week): 0
Tutorial (hrs/week): 1